The present invention relates to a semiconductor package which is suitable for loading and wire-bonding of large chips according to high-integration tendency.
Generally, the semiconductor package, which is loaded with the chip, is formed by molding with a compound after attachment of the chip on a pad and wire-bonding the chip with leads arranged at around the pad.
In the package, however, a large space is necessary for the pad on which the chip is attached and a predetermined distance must be kept between the pad and the leads. Thus, the total occupying area of the pad becomes large and the package size becomes large, too.
Also, the increased length of the wire-bonding due to a longer distance between the pad and the leads degrades the efficiency of the wire-bonding and the reliability of products due to the deformation of the wire at the midspan. Moreover, according to the tendency to the multifunction and high-integration density of a chip, the chip size becomes much larger and the number of the leads is also increased in response thereto.
Thus, as shown in FIG. 6, a new package which can be loaded with the chips without the pad has been developed for high-function, high-integration as well as miniaturization. This package is formed by extending a lead 42 to position close to the center of a chip 41 after forming electrodes 41a at the center portion of the chip 41. The chip 41 is supported by such an extended lead 42 which is attached on the chip 41 with an adhesive agent.
If the electrodes 41a are arranged at the center portion of the chip 41, it is possible to support the chip 41 with the lead 42, but if the electrodes 41a are arranged at the outer side of the chip 41, the wire-bonding is impossible.
Also, if the length of the lead 42 is shortened to be suitable for the wire-bonding, the portion to support the chip 41 is reduced, so that the loading of the chip 41 becomes impossible.